Journal Articles
Rangsikunpum, A, Amiri, S,
Ost, L (2024)
BIDS: An efficient Intrusion Detection System for in-vehicle networks using a two-stage Binarised Neural Network on low-cost FPGA,
Journal of Systems Architecture, 156, pp.103285-103285, ISSN: 1383-7621. DOI:
10.1016/j.sysarc.2024.103285.
Pereira, EG, Garibotti, RF,
Ost, LC, Calazans, NLV, Moraes, FG (2024)
A Complementary Survey of Radiation-Induced Soft Error Research: Facilities, Particles, Devices and Trends,
Journal of Integrated Circuits and Systems, 19(2), ISSN: 1807-1953. DOI:
10.29292/jics.v19i2.846.
Gava, J, Sartori, T, Hanneman, A, Garibotti, R, Moraes, F, Calazans, N, Fourati, H, Bastos, R, Reis, R,
Ost, L (2024)
Soft error assessment of attitude estimation algorithms running on resource-constrained devices under neutron radiation,
IEEE Transactions on Nuclear Science, ISSN: 0018-9499. DOI:
10.1109/TNS.2024.3378689.
Fleck, M, Pereira, E, Gava, J, Silva, H, Moraes, F, Calazans, N, Meneguzzi, F, Bastos, R, Reis, R,
Ost, L, Garibotti, R (2024)
Assessment of radiation-induced soft error on unmanned surface vehicles,
IEEE Transactions on Nuclear Science, ISSN: 0018-9499. DOI:
10.1109/TNS.2024.3378807.
Rangsikunpum, A, Amiri, S,
Ost, L (2024)
A Reconfigurable Coarse‐to‐Fine Approach for the Execution of CNN Inference Models in Low‐Power Edge Devices,
IET Computers & Digital Techniques, 2024(1), ISSN: 1751-8601. DOI:
10.1049/cdt2/6214436.
Gava, J, Hanneman, A, Abich, G, Garibotti, R, Cuenca-Asensi, S, Bastos, RP, Reis, R,
Ost, L (2023)
A lightweight mitigation technique for resource-constrained devices executing DNN inference models under neutron radiation,
IEEE Transactions on Nuclear Science, 70(8), pp.1625-1633, ISSN: 0018-9499. DOI:
10.1109/tns.2023.3262448.
Gava, J, Moura, N, Lucena, J, Rocha, V, Garibotti, R, Calazans, N, Cuenca-Asensi, S, Bastos, RP, Reis, R,
Ost, L (2023)
Assessment of radiation-induced soft errors on lightweight cryptography algorithms running on a resource-constrained device,
IEEE Transactions on Nuclear Science, 70(8), pp.1805-1813, ISSN: 0018-9499. DOI:
10.1109/tns.2023.3253684.
Lodéa, N, Nunes, W, Zanini, V, Sartori, M,
Ost, L, Calazans, N, Garibotti, R, Marcon, C (2022)
Early Soft Error Reliability Analysis on RISC-V,
IEEE Latin America Transactions, 20(9), pp.2139-2145, DOI:
10.1109/tla.2022.9878169.
Gava, J, Bandeira, V, Rosa, F, Garibotti, R, Reis, R,
Ost, L (2022)
SOFIA: An automated framework for early soft error assessment, identification, and mitigation,
Journal of Systems Architecture, 131(2022), 102710, ISSN: 1383-7621. DOI:
10.1016/j.sysarc.2022.102710.
Hanneman, A, Fawden, T, Branciforte, M, Virzi, MC, Moss, EL,
Ost, L, Zecca, M (2022)
Novel low memory footprint DNN models for edge classification of surgeons’ postures,
IEEE Embedded Systems Letters, 15(1), pp.21-24, ISSN: 1943-0663. DOI:
10.1109/les.2022.3190707.
Possamai Bastos, R, Trindade, MG, Garibotti, R, Gava, J, Reis, R,
Ost, L (2022)
Assessment of Tiny Machine-Learning Computing Systems Under Neutron-Induced Radiation Effects,
IEEE Transactions on Nuclear Science, 69(7), pp.1683-1690, ISSN: 0018-9499. DOI:
10.1109/tns.2022.3176485.
Abich, G, Garibotti, R, Reis, R,
Ost, L (2022)
The impact of soft errors in memory units of edge devices executing convolutional neural networks,
IEEE Transactions on Circuits and Systems II: Express Briefs, 69(3), pp.679-683, ISSN: 1549-7747. DOI:
10.1109/tcsii.2022.3141243.
Bandeira, V, Sampford, J, Garibotti, R, Trindade, MG, Bastos, RP, Reis, R,
Ost, L (2021)
Impact of radiation-induced soft error on embedded cryptography algorithms,
Microelectronics Reliability, 126, 114349, ISSN: 0026-2714. DOI:
10.1016/j.microrel.2021.114349.
Abich, G, Gava, J, Garibotti, R, Reis, R,
Ost, L (2021)
Applying lightweight soft error mitigation techniques to embedded mixed precision deep neural networks,
IEEE Transactions on Circuits and Systems I: Regular Papers, 68(11), pp.4772-4782, ISSN: 1549-8328. DOI:
10.1109/tcsi.2021.3097981.
Abich, G, Garibotti, R, Bandeira, V, da Rosa, F, Gava, J, Bortolon, F, Medeiros, G, Moraes, FG, Reis, R,
Ost, L (2021)
Evaluation of the soft error assessment consistency of a JIT‐based virtual platform simulator,
IET Computers & Digital Techniques, 15(2), pp.125-142, ISSN: 1751-8601. DOI:
10.1049/cdt2.12017.
Bandeira, V, Oliveira, I, Rosa, F, Reis, R,
Ost, L (2020)
An extensive soft error reliability analysis of a real autonomous vehicle software stack,
IEEE Transactions on Circuits and Systems II: Express Briefs, 68(1), pp.446-450, ISSN: 1549-7747. DOI:
10.1109/tcsii.2020.3011367.
da Rosa, FR, Garibotti, R,
Ost, L, Reis, R (2019)
Using Machine Learning Techniques to Evaluate Multicore Soft Error Reliability,
IEEE Transactions on Circuits and Systems I: Regular Papers, 66(6), pp.2151-2164, ISSN: 1549-8328. DOI:
10.1109/tcsi.2019.2906155.
Garibotti, R,
Ost, L, Butko, A, Reis, RA, Gamatie, A, Sassatelli, G (2019)
Exploiting memory allocations in clusterized many-core architectures,
IET Computers & Digital Techniques, ISSN: 1751-8601. DOI:
10.1049/iet-cdt.2018.5136.
Rodrigues, G, ROSA, FELIPE, de Oliveira, A, Lima Kastensmidt, F,
Ost, L, Reis, R (2017)
Analyzing the Impact of Fault Tolerance Methods in ARM Processors under Soft Errors running Linux and Parallelization APIs,
IEEE Transactions on Nuclear Science, pp.1-1, ISSN: 0018-9499. DOI:
10.1109/TNS.2017.2706519.
Castilhos, G, Mandelli, M,
Ost, L, Moraes, FG (2016)
Hierarchical energy monitoring for task mapping in many-core systems,
Journal of Systems Architecture, 63, pp.80-92, ISSN: 1383-7621. DOI:
10.1016/j.sysarc.2016.01.005.
Chielle, E, Rosa, F, Rodrigues, GS, Tambara, LA, Tonfat, J, Macchione, E, Aguirre, F, Added, N, Medina, N, Aguiar, V, Silveira, MAG,
Ost, L, Reis, R, Cuenca-Asensi, S, Kastensmidt, FL (2016)
Reliability on ARM Processors Against Soft Errors Through SIHFT Techniques,
IEEE Transactions on Nuclear Science, pp.1-9, ISSN: 0018-9499. DOI:
10.1109/tns.2016.2525735.
Garibotti, R, Butko, A,
Ost, L, Gamatie, A, Sassatelli, G, Adeniyi-Jones, C (2015)
Efficient Embedded Software Migration towards Clusterized Distributed-Memory Architectures,
IEEE Transactions on Computers, 65(8), pp.2645-2651, ISSN: 0018-9340. DOI:
10.1109/tc.2015.2485202.
Rosa, FR, Brum, RM, Wirth, G, Kastensmidt, F,
Ost, L, Reis, R (2015)
Impact of dynamic voltage scaling and thermal factors on SRAM reliability,
Microelectronics Reliability, 55(9-10), pp.1486-1490, ISSN: 0026-2714. DOI:
10.1016/j.microrel.2015.07.013.
Stapfner, S,
Ost, L, Hunger, D, Reichel, J, Favero, I, Weig, EM (2013)
Cavity-enhanced optical detection of carbon nanotube Brownian motion,
APPLIED PHYSICS LETTERS, 102(15), ARTN 151910, ISSN: 0003-6951. DOI:
10.1063/1.4802746.
Ost, L, Garibotti, R, Sassatelli, G, Marchesan Almeida, G, Busseuil, RM, Butko, A, Robert, M, Becker, JR (2013)
Novel Techniques for Smart Adaptive Multiprocessor SoCs,
IEEE Transactions on Computers, pp.1-1, ISSN: 0018-9340. DOI:
10.1109/tc.2013.57.
Ost, L, Mandelli, M, Almeida, GM, Moller, L, Indrusiak, LS, Sassatelli, G, Benoit, P, Glesner, M, Robert, M, Moraes, F (2013)
Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach,
ACM Transactions on Embedded Computing Systems, 12(3), pp.1-22, ISSN: 1539-9087. DOI:
10.1145/2442116.2442125.
Almeida, GM, Busseuil, R,
Ost, L, Bruguier, F, Sassatelli, G, Benoit, P, Torres, L, Robert, M (2011)
PI and PID Regulation Approaches for Performance-Constrained Adaptive Multiprocessor System-on-Chip,
IEEE Embedded Systems Letters, 3(3), pp.77-80, ISSN: 1943-0663. DOI:
10.1109/les.2011.2166373.
Ost, L, Guindani, G, Moraes, F, Indrusiak, L, Maatta, S (2011)
Exploring NoC-Based MPSoC Design Space with Power Estimation Models,
IEEE Design & Test of Computers, 28(2), pp.16-29, ISSN: 0740-7475. DOI:
10.1109/mdt.2010.116.
Määttä, S, Möller, L, Indrusiak, LS,
Ost, L, Glesner, M, Nurmi, J, Moraes, F (2010)
Joint Validation of Application Models and Multi-Abstraction Network-on-Chip Platforms,
International Journal of Embedded and Real-Time Communication Systems, 1(1), pp.86-101, ISSN: 1947-3176. DOI:
10.4018/jertcs.2010103005.
Moraes, F, Calazans, N, Mello, A, Möller, L,
Ost, L (2004)
HERMES: an infrastructure for low area overhead packet-switching networks on chip,
Integration, 38(1), pp.69-93, ISSN: 0167-9260. DOI:
10.1016/j.vlsi.2004.03.003.
Conferences
Rangsikunpum, A, Amiri, S,
Ost, L (2024)
An FPGA-Based Intrusion Detection System Using Binarised Neural Network for CAN Bus Systems. In
, Proceedings of the IEEE International Conference on Industrial Technology. DOI:
10.1109/ICIT58233.2024.10540960.
Liu, Q, Amiri, S,
Ost, L (2024)
Exploring RISC-V Based DNN Accelerators. In
, 2024 IEEE International Conference on Omni-Layer Intelligent Systems, COINS 2024. DOI:
10.1109/COINS61597.2024.10622495.
Hanneman, A, Gava, J, Vancin, P, Kaim-Khani, AK, Amiri, S, Garibotti, R, Moraes, F, Calazans, N, Reis, R,
Ost, L (2024)
Soft Error Assessment of UAV Control Algorithms Running in Resource-Constrained Microprocessors. In
, Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, pp.694-698, DOI:
10.1109/ISVLSI61997.2024.00133.
Gava, J, Sartori, TKS, Hanneman, A, Garibotti, R, Calazans, N, Fourati, H, Bastos, RP, Reis, R,
Ost, L (2023)
Soft error assessment of attitude estimation algorithms running in a resource-constrained device under neutron radiation. In
RADiation and its Effects on Components and Systems Conference (RADECS 2023); RADECS 2023 - International Conference on Radiation and its Effects on Components and Systems, Toulouse, France, pp.1-4.
Pereira, E, Luza, L, Moura, N,
Ost, L, Calazans, N, Moraes, F, Garibotti, R (2023)
Assessment of Communication Protocols' Latency in Co-processing Robotic Systems. In
, 21st IEEE Interregional NEWCAS Conference, NEWCAS 2023 - Proceedings. DOI:
10.1109/NEWCAS57931.2023.10198085.
Abich, G, Da Silva, AI, Thums, JE, Da Silva, R, Susin, AA, Reis, R,
Ost, L (2023)
Power, Performance and Reliability Evaluation of Multi-thread Machine Learning Inference Models Executing in Multicore Edge Devices. In
, Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI. DOI:
10.1109/ISVLSI59464.2023.10238535.
Moura, N, Lucena, J, Pereira, E, Calazans, N,
Ost, L, Moraes, F, Garibotti, R (2023)
Assessment of Lightweight Cryptography Algorithms on ARM Cortex-M Processors. In
, Proceedings - 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, SBCCI 2023. DOI:
10.1109/SBCCI60457.2023.10261962.
Abich, G, Silva, AI, Gava, J, Susin, AA, Reis, R,
Ost, L (2023)
Power and Performance Costs of Radiation-Hardened ML Inference Models Running on Edge Devices. In
, Proceedings - 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, SBCCI 2023. DOI:
10.1109/SBCCI60457.2023.10261657.
Jadhav, U, Malathi, P,
Ost, L, Garibotti, R, Gava, J (2023)
Multicore soft error reliability assessment and evaluation of Compiler optimization flag Effects on ARMv7 and ARMv8. In
, 2023 IEEE 20th India Council International Conference, INDICON 2023, pp.555-560, DOI:
10.1109/INDICON59947.2023.10440741.
Hanneman, A, Gava, J, Bandeira, V, Garibotti, R, Reis, R,
Ost, L (2023)
DeBaTE-FI: A Debugger-Based Fault Injector Infrastructure for IoT Soft Error Reliability Assessment. In
, 2023 IEEE World Forum on Internet of Things: The Blue Planet: A Marriage of Sea and Space, WF-IoT 2023. DOI:
10.1109/WF-IoT58464.2023.10539573.
Gava, J, Reis, R,
Ost, L (2022)
Investigation of Hybrid Soft Error Mitigation Techniques for Applications running on Resource-constrained devices. In
2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC), pp.1-2, DOI:
10.1109/vlsi-soc54400.2022.9939658.
Abich, G, Garibotti, R, Gava, J, Reis, R,
Ost, L (2022)
Impact of Thread Parallelism on the Soft Error Reliability of Convolution Neural Networks. In
, 2022 IEEE 13th Latin American Symposium on Circuits and Systems, LASCAS 2022. DOI:
10.1109/LASCAS53948.2022.9789088.
Rocha, VD, Moura, N, Gava, J, Bandeira, V,
Ost, L, Reis, R, Garibotti, R (2022)
Soft Error Reliability Assessment of Lightweight Cryptographic Algorithms for IoT Edge Devices. In
, Proceedings - IEEE International Symposium on Circuits and Systems, pp.457-460, DOI:
10.1109/ISCAS48785.2022.9937998.
Domingues, ARP, Filho, SJ, de Amory, AM,
Ost, L, Moraes, FG (2022)
Design-Time Scheduling of Periodic, Hard Real-Time Flows for NoC-based Systems. In
, ICECS 2022 - 29th IEEE International Conference on Electronics, Circuits and Systems, Proceedings. DOI:
10.1109/ICECS202256217.2022.9970868.
Gava, J, Dorneles, G, Reis, R, Garibotti, R,
Ost, L (2022)
Soft Error Assessment of CNN Inference Models Running on a RISC-V Processor. In
, ICECS 2022 - 29th IEEE International Conference on Electronics, Circuits and Systems, Proceedings. DOI:
10.1109/ICECS202256217.2022.9970958.
Abich, G, Reis, R,
Ost, L (2021)
The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network. In
, 2021 IEEE 12th Latin American Symposium on Circuits and Systems, LASCAS 2021. DOI:
10.1109/LASCAS51355.2021.9667153.
Gava, J, Reis, R,
Ost, L (2021)
RAT: A Lightweight Architecture Independent System-Level Soft Error Mitigation Technique. In
, pp.235-253, ISBN: 9783030816407. DOI:
10.1007/978-3-030-81641-4_11.
Trindade, MG, Bastos, RP, Garibotti, R,
Ost, L, Letiche, M, Beaucour, J (2020)
Assessment of Machine Learning Algorithms for Near-Sensor Computing under Radiation Soft Errors. In
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS). DOI:
10.1109/icecs49266.2020.9294938.
Abich, G, Gava, J, Reis, R,
Ost, L (2020)
Soft Error Reliability Assessment of Neural Networks on Resource-constrained IoT Devices. In
2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS). DOI:
10.1109/icecs49266.2020.9294951.
Gava, J, Reis, R,
Ost, L (2020)
RAT: A Lightweight System-level Soft Error Mitigation Technique. In
2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC), pp.165-170, DOI:
10.1109/vlsi-soc46417.2020.9344080.
Bandeira, V, Rosa, F, Reis, R,
Ost, L (2020)
Efficient Soft Error Vulnerability Analysis Using Non-intrusive Fault Injection Techniques. In
, pp.115-137, ISBN: 9783030532727. DOI:
10.1007/978-3-030-53273-4_6.
Oliveira, I, Bandeira, V, Reis, R,
Ost, L (2019)
Exploration of Techniques to Assess Soft Errors in Multicore Architectures. In
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC), pp.251-252, DOI:
10.1109/vlsi-soc.2019.8920357.
Bandeira, V, Oliveira, I, Rosa, FD, Reis, R,
Ost, L (2019)
Soft Error Reliability Analysis of Autonomous Vehicles Software Stack. In
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC), pp.253-254, DOI:
10.1109/vlsi-soc.2019.8920372.
Bandeira, V, Rosa, F, Reis, R,
Ost, L (2019)
Non-intrusive Fault Injection Techniques for Efficient Soft Error Vulnerability Analysis. In
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC). DOI:
10.1109/vlsi-soc.2019.8920378.
Gava, J, Bandeira, V, Reis, R,
Ost, L (2019)
Evaluation of Compilers Effects on OpenMP Soft Error Resiliency. In
2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp.259-264, DOI:
10.1109/isvlsi.2019.00055.
Medeiros, GE, Bortolon, FT, Reis, R,
Ost, L (2018)
Evaluation of Compiler Optimization Flags Effects on Soft Error Resiliency. In
SBCCI, 31st Symposium on Integrated Circuits and Systems Design, SBCCI 2018, Brazil,ISBN: 9781538674314. DOI:
10.1109/SBCCI.2018.8533246.
Hamerski, JC, Abich, G, Reis, R,
Ost, L, Amory, A (2018)
A Design Patterns-Based Middleware for Multiprocessor Systems-on-Chip. In
2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI), pp.1-6, DOI:
10.1109/sbcci.2018.8533250.
Bortolon, FT, Abich, G, Bampi, S, Reis, R, Moraes, F,
Ost, L (2018)
Exploring the Impact of Soft Errors on NoC-based Multiprocessor Systems. In
2018 IEEE International Symposium on Circuits and Systems (ISCAS), pp.1-5, DOI:
10.1109/iscas.2018.8351391.
Rocha da Rosa, F, Reis, R,
Ost, L (2018)
Early evaluation of multicore systems soft error reliability using virtual platforms. In
2018 2nd Conference on PhD Research in Microelectronics and Electronics Latin America (PRIME-LA), pp.1-4, DOI:
10.1109/prime-la.2018.8370388.
Da Rosa, FR, Reis, R,
Ost, L (2018)
gem5-FIM: a flexible and scalable multicore soft error assessment framework to early reliability design space explorations. In
2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), pp.1-4, DOI:
10.1109/lascas.2018.8717606.
da Rosa, F, Bandeira, V, Reis, R,
Ost, L (2018)
Extensive evaluation of programming models and ISAs impact on multicore soft error reliability. In
,ISBN: 9781450357005. DOI:
10.1145/3195970.3196050.
Rodrigues, GS, Rosa, F, Kastensmidt, FL, Reis, R,
Ost, L (2017)
Investigating parallel TMR approaches and thread disposability in Linux. In
2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp.393-396, DOI:
10.1109/icecs.2017.8292013.
Rosa, F,
Ost, L, Reis, R, Davidmann, S, Lapides, L (2017)
Evaluation of multicore systems soft error reliability using virtual platforms. In
2017 15th IEEE International New Circuits and Systems Conference (NEWCAS), pp.85-88, DOI:
10.1109/newcas.2017.8010111.
Hamerski, JC, Abich, G, Reis, R,
Ost, L, Amory, A (2017)
Publish-subscribe programming for a NoC-based multiprocessor system-on-chip. In
2017 IEEE International Symposium on Circuits and Systems (ISCAS), pp.1-4, DOI:
10.1109/iscas.2017.8050967.
Abich, G, Mandelli, MG, Rosa, FR, Moraes, F,
Ost, L, Reis, R (2016)
Extending FreeRTOS to support dynamic and distributed mapping in multiprocessor systems. In
2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp.712-715, DOI:
10.1109/icecs.2016.7841301.
Rodrigues, GS, Kastensmidt, FL, Reis, R, Rosa, F,
Ost, L (2016)
Analyzing the impact of using pthreads versus OpenMP under fault injection in ARM Cortex-A9 dual-core. In
2016 16th European Conference on Radiation and its Effects on Components and Systems (RADECS), 2016 16th European Conference on Radiation and Its Effects on Components and Systems (RADECS), pp.1-6, DOI:
10.1109/radecs.2016.8093180.
Castilhos, G, Moraes, FG,
Ost, L (2016)
A lightweight software-based runtime temperature monitoring model for multiprocessor embedded systems. In
2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI), pp.1-6, DOI:
10.1109/sbcci.2016.7724040.
Latif, K, Selva, M, Effiong, C, Ursu, R, Gamatie, A, Sassatelli, G, Zordan, L,
Ost, L, Dziurzanski, P, Indrusiak, LS (2016)
Design space exploration for complex automotive applications. In
RAPIDO '16: Rapid Simulation and Performance Evaluation: Methods and Tools, Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools. DOI:
10.1145/2852339.2852341.
Madalozzo, G, Mandelli, M,
Ost, L, Moraes, FG (2015)
A platform-based design framework to boost many-core software development. In
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp.320-323, DOI:
10.1109/icecs.2015.7440313.
Rosa, FR, Brum, RM, Wirth, G,
Ost, L, Reis, R (2015)
Impact of dynamic voltage scaling and thermal factors on FinFET-based SRAM reliability. In
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp.137-140, DOI:
10.1109/icecs.2015.7440268.
Rosa, F, Kastensmidt, F, Reis, R,
Ost, L (2015)
A fast and scalable fault injection framework to evaluate multi/many-core soft error reliability. In
2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), pp.211-214, DOI:
10.1109/dft.2015.7315164.
Mandelli, M, Castilhos, G, Sassatelli, G,
Ost, L, Moraes, FG (2015)
A Distributed Energy-aware Task Mapping to Achieve Thermal Balancing and Improve Reliability of Many-core Systems. In
SBCCI '15: 28th Symposium on Integrated Circuits and Systems Design, Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, pp.1-7, DOI:
10.1145/2800986.2800992.
Mandelli, M,
Ost, L, Sassatelli, G, Moraes, F (2015)
Trading-off system load and communication in mapping heuristics for improving NoC-based MPSoCs reliability. In
2015 16th International Symposium on Quality Electronic Design (ISQED), Sixteenth International Symposium on Quality Electronic Design, pp.392-396, DOI:
10.1109/isqed.2015.7085457.
Butko, A, Garibotti, R,
Ost, L, Lapotre, V, Gamatie, A, Sassatelli, G, Adeniyi-Jones, C (2015)
A trace-driven approach for fast and accurate simulation of manycore architectures. In
2015 20th Asia and South Pacific Design Automation Conference (ASP-DAC), The 20th Asia and South Pacific Design Automation Conference. DOI:
10.1109/aspdac.2015.7059093.
Mandelli, M,
Ost, L, Sassatelli, G, Moraes, F, IEEE, (2015)
Trading-off System Load and Communication in Mapping Heuristics for Improving NoC-Based MPSoCs Reliability. In
, PROCEEDINGS OF THE SIXTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2015), pp.387-391.
Rosa, F,
Ost, L, Raupp, T, Moraes, F, Reis, R (2014)
Fast energy evaluation of embedded applications for many-core systems. In
2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp.1-6, DOI:
10.1109/patmos.2014.6951893.
Mandelli, MG, da Rosa, FR,
Ost, L, Sassatelli, G, Moraes, FG (2013)
Multi-level MPSoC modeling for reducing software development cycle. In
2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS), pp.489-492, DOI:
10.1109/icecs.2013.6815460.
Rosa, F,
Ost, L, Reis, R, Sassatelli, G (2013)
Instruction-driven timing CPU model for efficient embedded software development using OVP. In
2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS), pp.855-858, DOI:
10.1109/icecs.2013.6815549.
Moreira, MT, Oliveira, CHM, Calazans, NLV,
Ost, LC (2013)
LiChEn: Automated Electrical Characterization of Asynchronous Standard Cell Libraries. In
2013 Euromicro Conference on Digital System Design (DSD), 2013 Euromicro Conference on Digital System Design, pp.933-940, DOI:
10.1109/dsd.2013.105.
Garibotti, R,
Ost, L, Busseuil, R, kourouma, M, Adeniyi-Jones, C, Sassatelli, G, Robert, M (2013)
Simultaneous multithreading support in embedded distributed memory MPSoCs. In
DAC '13: The 50th Annual Design Automation Conference 2013, Proceedings of the 50th Annual Design Automation Conference, pp.1-7, DOI:
10.1145/2463209.2488836.
Moller, L, Indrusiak, LS,
Ost, L, Moraes, F, Glesner, M (2012)
Comparative analysis of dynamic task mapping heuristics in heterogeneous NoC-based MPSoCs. In
2012 International Symposium on System-on-Chip - SOC, 2012 International Symposium on System on Chip (SoC), pp.1-4, DOI:
10.1109/issoc.2012.6376357.
Ost, L, Varyani, S, Indrusiak, LS, Mandelli, M, Almeida, GM, Wachter, E, Moraes, F, Sassatelli, G (2012)
Enabling Adaptive Techniques in Heterogeneous MPSoCs Based on Virtualization. In
, ACM Transactions on Reconfigurable Technology and Systems, pp.1-11, DOI:
10.1145/2362374.2362381.
Butko, A, Garibotti, R,
Ost, L, Sassatelli, G (2012)
Accuracy evaluation of GEM5 simulator system. In
2012 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), pp.1-7, DOI:
10.1109/recosoc.2012.6322869.
Busseuil, R,
Ost, L, Garibotti, R, Sassatelli, G, Robert, M (2012)
Remote Execution in Distributed Memory MPSoC. In
2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines, pp.121-124, DOI:
10.1109/fccm.2012.30.
Busseuil, R, Almeida, GM,
Ost, L, Varyani, S, Sassatelli, G, Robert, M (2012)
Adaptation Strategies in Multiprocessors System on Chip. In
, pp.233-257, ISBN: 9783642285653. DOI:
10.1007/978-3-642-28566-0_10.
Busseuil, R, Barthe, L, Almeida, GM,
Ost, L, Bruguier, F, Sassatelli, G, Benoit, P, Robert, M, Torres, L (2011)
Open-Scale: A Scalable, Open-Source NOC-based MPSoC for Design Space Exploration. In
2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2011), 2011 International Conference on Reconfigurable Computing and FPGAs, pp.357-362, DOI:
10.1109/reconfig.2011.66.
Ost, L, Mandelli, M, Almeida, GM, Indrusiak, LS, Moller, L, Glesner, M, Sassatelli, G, Robert, M, Moraes, F (2011)
Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework. In
SBCCI '11: 24th Symposium on Integrated Circuits and Systems Design, Proceedings of the 24th symposium on Integrated circuits and systems design, pp.185-190, DOI:
10.1145/2020876.2020919.
Mandelli, M, Amory, A,
Ost, L, Moraes, FG (2011)
Multi-task dynamic mapping onto NoC-based MPSoCs. In
SBCCI '11: 24th Symposium on Integrated Circuits and Systems Design, Proceedings of the 24th symposium on Integrated circuits and systems design, pp.191-196, DOI:
10.1145/2020876.2020920.
Ost, L, Almeida, GM, Mandelli, M, Wachter, E, Varyani, S, Sassatelli, G, Indrusiak, LS, Robert, M, Moraes, F (2011)
Exploring heterogeneous NoC-based MPSoCs: From FPGA to high-level modeling. In
2011 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), pp.1-8, DOI:
10.1109/recosoc.2011.5981517.
Amory, AM,
Ost, LC, Marcon, CAM, Moraes, FG, Lubaszewski, MS (2011) Evaluating energy consumption of homogeneous MPSoCs using spare tiles. In
, Proceedings -Design, Automation and Test in Europe, DATE, pp.1164-1167.
Roth, C, Almeida, GM, Sander, O,
Ost, L, Hebert, N, Sassatelli, G, Benoit, P, Torres, L, Becker, J (2011)
Modular Framework for Multi-level Multi-device MPSoC Simulation. In
Distributed Processing, Workshops and Phd Forum (IPDPSW), 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum, pp.136-142, DOI:
10.1109/ipdps.2011.134.
Mandelli, M,
Ost, L, Carara, E, Guindani, G, Gouvea, T, Medeiros, G, Moraes, FG (2011)
Energy-aware dynamic task mapping for NoC-based MPSoCs. In
2011 IEEE International Symposium on Circuits and Systems (ISCAS), 2011 IEEE International Symposium of Circuits and Systems (ISCAS), pp.1676-1679, DOI:
10.1109/iscas.2011.5937903.
Ost, L, Indrusiak, LS, Maatta, S, Mandelli, M, Nurmi, J, Moraes, F (2010)
Model-based design flow for NoC-based MPSoCs. In
2010 17th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2010), 2010 17th IEEE International Conference on Electronics, Circuits and Systems, pp.750-753, DOI:
10.1109/icecs.2010.5724621.
Maatta, S, Indrusiak, LS,
Ost, L, Moller, L, Glesner, M, Moraes, FG, Nurmi, J (2010)
A case study of hierarchically heterogeneous application modelling using UML and Ptolemy II. In
2010 International Symposium on System-on-Chip - SOC, 2010 International Symposium on System on Chip, pp.68-71, DOI:
10.1109/issoc.2010.5625554.
Indrusiak, LS,
Ost, LC, Moraes, FG, Maatta, S, Nurmi, J, Moller, L, Glesner, M (2010)
Evaluating the impact of communication latency on applications running over on-chip multiprocessing platforms: A layered approach. In
2010 8th IEEE International Conference on Industrial Informatics (INDIN), 2010 8th IEEE International Conference on Industrial Informatics, pp.148-153, DOI:
10.1109/indin.2010.5549443.
Maatta, S, Indrusiak, LS,
Ost, L, Moller, L, Glesner, M, Moraes, FG, Nurmi, J (2009)
Characterising embedded applications using a UML profile. In
2009 International Symposium on System-on-Chip - SOC 2009, 2009 International Symposium on System-on-Chip, pp.172-175, DOI:
10.1109/socc.2009.5335654.
Ost, L, Guindani, G, Indrusiak, LS, Reinbrecht, C, Raupp, T, Moraes, F (2009)
A high abstraction, high accuracy power estimation model for networks-on-chip. In
SBCCI '09: 22nd Symposium on Integrated Circuits and System Design, Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes, pp.1-6, DOI:
10.1145/1601896.1601936.
Ost, L, Moraes, FG, Möller, L, Indrusiak, LS, Glesner, M, Määttä, S, Nurmi, J (2008)
A simplified executable model to evaluate latency and throughput of networks-on-chip. In
SBCCI08: 21st Symposium on Integrated Circuits and System Design, Proceedings of the 21st annual symposium on Integrated circuits and system design, pp.170-175, DOI:
10.1145/1404371.1404420.
Maatta, S, Indrusiak, LS,
Ost, L, Moller, L, Nurmi, J, Glesner, M, Moraes, F (2008)
Validation of executable application models mapped onto network-on-chip platforms. In
2008 International Symposium on Industrial Embedded Systems (SIES), 2008 International Symposium on Industrial Embedded Systems, pp.118-125, DOI:
10.1109/sies.2008.4577689.
Indrusiak, LS,
Ost, L, Möller, L, Moraes, F, Glesner, M (2008)
Applying UML Interactions and Actor-Oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects. In
2008 IEEE Computer Society Annual Symposium on VLSI, pp.491-494, DOI:
10.1109/isvlsi.2008.20.
Delamare, F, Dotti, FL, Fernandes, P, Nunes, CM,
Ost, LC (2006)
Analytical modeling of random waypoint mobility patterns. In
MSWiM06: 9th International Symposium on Modeling, Analysis and Simulation of Wireless and Mobile Systems 2006, Proceedings of the 3rd ACM international workshop on Performance evaluation of wireless ad hoc, sensor and ubiquitous networks, pp.106-113, DOI:
10.1145/1163610.1163628.
Ost, L, Mello, A, Palma, J, Moraes, F, Calazans, N (2005) MAIA - A framework for networks on chip generation and verification. In
, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp.49-52.
Vetromille, M, Ost, L, Marcon, CAM, Reif, C, Hessel, F (Accepted for publication) RTOS Scheduler Implementation in Hardware and Software for Real Time Applications. In Seventeenth IEEE International Workshop on Rapid System Prototyping (RSP'06), pp.163-168, DOI: 10.1109/rsp.2006.34.
Copello Ost, L, Mainardi, M, Soares Indrusiak, L, Reis, R (Accepted for publication) Jale3D-platform-independent IC/MEMS layout edition tool. In 14th Symposium on Integrated Circuits and Systems Design, Symposium on Integrated Circuits and Systems Design, pp.174-179, DOI: 10.1109/sbcci.2001.953023.
